Dev/BeagleBone/BeagleYAI: Difference between revisions

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: - two additional Arm Cortex-R5F cores (Device management and Run-time management).
: - two additional Arm Cortex-R5F cores (Device management and Run-time management).
* BXS-4-64 GPU
* BXS-4-64 GPU
The complete list of cores can be found [https://software-dl.ti.com/tisci/esd/latest/5_soc_doc/j722s/hosts.html in this "Enumeration of Host IDs" table].
The complete [https://software-dl.ti.com/tisci/esd/latest/5_soc_doc/j722s/processors.html list of processors] and [https://software-dl.ti.com/tisci/esd/latest/5_soc_doc/j722s/hosts.html cores]. Note that a physical processor can have multiple Host IDs (cores) depending on context and domain.


=== Memory ===
=== Memory ===

Revision as of 17:32, 13 March 2025

Description

Processor

  • The board has a TI Jacinto J722S (TDA4AEN) AM67A SOC with
- four Arm Cortex-A53 cores (main cores, 1.4Ghz)
- two C7x DSP cores
- one user Arm Cortex-R5F core (MCU channel with FFI, 800Mhz)
- two additional Arm Cortex-R5F cores (Device management and Run-time management).
  • BXS-4-64 GPU

The complete list of processors and cores. Note that a physical processor can have multiple Host IDs (cores) depending on context and domain.

Memory

  • 4Go LPDDR4
  • EEPROM (FT24C32A) on I2C0
  • microSD Card


The Boot process

Overview

From chapter "9.2. Understanding bootloaders in Processor SDK J722S (RTOS/Linux) and Processor SDK Linux for AM67A, chapter 3.1.1.1 - U-Boot - General Information :

The boot process on the J722S processor requires two different U-Boot images and some firmwares, which will run on different cores.

Information is a little bit confused, maybe because there may be different ways to achieve the boot process.

  • tiboot3.bin
The first "Secondary Program Loader" (SPL) that the ROM bootloader will load and execute on the MCU R5F Core0
It seems to be an agregate of an U-Boot image (u-boot-spl.bin) and the TIFS firmware (sysfw)
It will try to load two images : "tifs.bin" (embedded) and "tispl.bin" (from SD card)
  • tifs.bin
TI Foundational Security (TIFS)
This firmware image is also called "SYSFW" and may be included inside tiboot3.bin.
It is used for the "Secure Management Services" (SMS), to be run on the corresponding R5F MCU.
  • tispl.bin
The second "Secondary Program Loader" (SPL). This one will run on one of the A53 cores.
This image includes the "ARM Trusted Firmware" (ATF or Trusted Firmware-A) and the "Trusted Execution Environment" (TEE, provided by OP-TEE).
It also includes the "Device Management" (DM) firmware which will run on one of the R5F cores. It provides the services refered to as Resource Management (RM) and Power Management (PM).
And then the "SPL" proper, which may be a reduced U-Boot image, commonly refered to as the "first-stage bootloader" which will mainly initialise the A53 core, the DDR memory, and the required subsystems so that the full U-Boot image can run.
  • uboot.img
This is the final U-Boot image, also called "second-stage bootloader", which will also run on one of the A53 cores.
This one will provide a prompt and load the Linux kernel.


Where to get more information

Credits : I started finding useful and accurate information on this post on medium by Olof Astrand : Building u-boot and the linux kernel for the beagleY AI board, though these rely on TI SDK, which I'd like to avoid as much as possible, both in order to understand everything, make things clear as what code is required (or binary blobs if any) and avoid huge unnecessary amounts of data which usually comes whith such SDK bundles.

Anyway, this post references some useful sources :

TI even provides access to the sources of these documentations : https://github.com/TexasInstruments/processor-sdk-doc !!

This patchset by Jacob Stiffler for Yocto also provides information : https://lore.kernel.org/all/1535138718-6772-2-git-send-email-j-stiffler@ti.com/T/

Sources

TI

Sources, branches and tags are referenced here : https://software-dl.ti.com/jacinto7/esd/processor-sdk-linux-am67a/latest/exports/docs/devices/J7_Family/linux/Release_Specific_Release_Notes.html

BeagleBone

git switch v2023.04-ti-09.02.00.009-BeagleY-AI

Others

Configs

U-Boot

make ARCH=arm O=../Build/u-boot/r5 am67a_beagley_ai_r5_defconfig
make ARCH=arm O=../Build/u-boot/a53 am67a_beagley_ai_a53_defconfig

Linux

Liens officiels

Pinout

Debug port Connection

Onboard connector

Despite what some have published about everywhere on the Web (even within official beagleboard online documentation), the connector IS NOT a JST connector. Some stupid guy made a confusion between the name of the footprint on the schematics or in the BOM and the name of the manufacturer.
The official BOM gives all the information :

  • Manufacturer : MTCONN
  • Manufacturer part number : MTWF63-103SRN-01163

Where to find mating connector

I did not find the exact connector reference on MTCONN website, but they have another one which seems to be the same one : https://www.mtconntech.com/wafer-conn-2-product/ which reference is "WTB10-XX-02-2" ... but I do not know where to get these, much less the mating connector.
Some googling gave me another manufacturer with a compatible reference : Wurth Elektronik.
What's nice with Wurth Elektronik is that they have an efficient website, with all the information, and their references are easy to order using Mouser or Digikey for example.
Here are the references/links for all the parts :

Choose the number of positions you need (3 for the debug port, but there's also a 2 positions and a 4 positions connector on the BeagleY-AI board), and either ask for samples or look for the corresponding parts reference number on your preferred components supplier.

Links

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